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Dr. Kariyappa B.S

 

Professor

Educational Qualification

B.E.(Electronics & Communication),

 M.E.( Electronics & Communication),

Ph.D (Digital Power Controller)

Experience

 

Teaching: 25 Years

 

Area of Interest

VLSI & Embedded System

Email ID

kariyappabs@rvce.edu.in

Date of Joining at RVCE: 13.12.1999

Subjects Handled: Digital IC Design, Low Power VLSI Design, Digital VLSI Design, Microprocessor and Microcontrollers, High Speed VLSI Design, Automotive Electronics, Embedded System Design, Analog Electronic Circuits, Logic Design, Advanced Miro-Processors and Interfacing, Digital System Design using VHDL , Digital ICs Applications, Solid State Devices, Basic VLSI Design, ARM Processors, Power Electronics, Information Theory and Coding, Satellite Communication, Design of Analog and Mixed mode VLSI Circuits

No. of Projects guided to UG Students: 45

No. of Projects guided to PG Students: 30

No. of Ph.d Students guiding/guided: 03

Publication Details

Journals

 

1. Adarsh S Jamadagni and Dr. Kariyappa B S, “SaaS Integration in Supply Chain Management Companies” International Journal for Research Trends and Innovation(IJRTI), ISSN: 2456-3315, PP:944-947, Volume 7, Issue 8, August 2022.

2.Manoj Y, Dr. B S Kariyappa, “A review on Buffer Chips and growing Memory Bandwidths”, International Journal for Research in Applied Science & Engineering Technology (IJRASET), DoI.org/10.22214/ijraset.2022.45912, ISSN: 2321-9653, Volume 10 Issue 7, July 2022.

3.Hemanth Kumar C S and Kariyappa B S, “Analysis of 7T SRAM Cell Based on MTCMOS, SVL and I-SVL Technique”, Indian Journal of Science and Technology, ISSN: 0974-5645, DOI: 10.17485/IJST/v15i23.1991, PP: 1143-1150, Vol:15, Issue: 23, Jun-2022.

4.Hemanth Kumar C S and Kariyappa B S “Node Voltage and KCL Model-Based Low Leakage Volatile and Non-Volatile 7T SRAM Cells”, IETE Journal of Research (Taylor & Francis), ISSN: 0377-2063, DOI: 10.1080/03772063.2022.2027279, PP:1-17, Vol:16, Issue:10, Feb-2022.
 

5.Praveen Kumar Y G, B S Kariyappa and M Z Kurian “Design, Implementation and Performance Analysis of Test Pattern Generator for Built-In Self-Test using m-GDI Technology” Indian Journal of Science and Technology, ISSN: 0974-5645, DOI: 10.17485/IJST/v15i5.1846, PP: 221-226, Volume 15, Issue 5, Jan-2022.

6.Juhie Fadnavis and Kariyappa B S “PNR Flow Methodology for Congestion Optimization using Different Macro Placement Strategies of DDR Memories” International Journal of Advanced Technology and Engineering Exploration (IJATEE), ISSN: 2394-5443, Doi: 10.19101/IJATEE.2021.874162, PP: 903-918, Volume 23, Issue 80, July 2021.

7.Rakshak Udupa T S, Shashank K Holla and Kariyappa B S, “Design and Performance Analysis of Active and Passive Cell Balancing for Lithium-Ion Batteries” Journal of University of Shanghai for Science and Technology, ISSN: 1007-6735, PP: 476-488, Volume 8, Issue 6, June 2021.

8.Ravi P Bhovi, Ranjith A C, Sachin K M and Kariyappa B S, “Modeling and Simulation of Battery Management System (BMS) for Electric Vehicles” Journal of University of Shanghai for Science and Technology, ISSN: 1007-6735, PP: 805-815, Volume 23, Issue 6, June 2021.
 

9.Binu D and Kariyappa B S, “Rider Deep LSTM Network for Hybrid Distance Score-based Fault Prediction in Analog Circuits ”, IEEE Transactions on Industrial Electronics, DOI: 10.1109/TIE.2020.3028796, ISSN: 0278-0046, PP: 10097 – 10106, Volume 68, Issue 10, October 2020.

10.Nithin M Banakar, Ravi A C, Yashwanth K N, Karyippa B S, “Design and Implementation of Smart Battery Management System for Electric Vehicles” Journal of Seybold, ISSN: 1533-9211, Volume 15, Issue 7, July 2020.

11.Praveen Kumar Y G, Kariyappa B S, Shashank S. M, Bharath C. N, “Performance Analysis of Multipliers Using Modified Gate Diffused Input Technology”, IETE Journal of Research (Taylor & Francis), ISSN: 0377-2063, DOI:10.1080/03772063.2020.1782778, June 2020.

12.Kavya S P and Kariyappa B S, “A Novel Approach for Power Optimization in Sequential Circuits using Latch Based Clock Gating”, International Journal of Electrical Engineering and Technology (IJEET), Volume 11, Issue 4, ISSN : 0976-6545, pp. 349-359, DOI: 10.34218/IJEET.11.4.2020.039, June 2020.
  13.Binu D, Kariyappa B S “RideNN: A New Rider Optimization Algorithm Based Neural Network for Fault Diagnosis in Analog Circuits”, IEEE Transactions on Instrumentation & Measurement, Vol. 68, Issue.1, Janaury 2019, ISSN: 0018-9456.
 

14.Bharath C N, Dr. Kariyappa B S, “Low Power Logically Reduced TSPC Flipflop Design using Dual Threshold CMOS Technology” Journal of Emerging Technologies and Innovative Research (JETIR), Volume 5, Issue 5, May 2018, ISSN: 2349-5162.
 

15.Appu Baby, Dr. Kariyappa B S, “Simulation and Modeling of Fractional-N sigma delta PLL for Quantisation Noise Optimisation” International Journal of Latest Technology in Engineering, Management & Applied Science (IJLTEMAS), Volume 6, Issue 11, November 2017, ISSN: 2278-2540.

 

16.D. Binu, Kariyappa B S, “A survey on fault diagnosis of analog circuits: Taxonomy and state of the art” AEU- International Journal of Electronics and Communications, Science Direct, Volume 73, January 2017, ISSN:1434-8411.

 

17.Dr. Kariyappa B S, Deeptha A, Drishika Muthanna, Dhrithi M and Pratiksha M, “A Novel Method of Testing a Reversible ALU” GE-International Journal of Engineering Research (GE-IJER) , Volume 4, Issue 10, October 2016, ISSN:2321-1717.

 

18.Adarsh Malagi, Dr. Kariyappa B S, “Logic Built In Self-Test Verification Statergy For SerDes PHY” International Journal of Engineering Research, Volume 5, Issue 10, October 2016, ISSN: 2319-6890.

 

19.Bheema. T, Dr. Kariyappa. B. S “Developing Inter-Integrated Circuit Master and Slave Universal Verification Component using UVM” International Journal of Engineering Technology, Management and Applied Sciences, Volume 3, Issue 6, ISSN 2349-4476, July 2015.

 

20.Sunil D K, Dr. Kariyappa B S “Design and Implementation of High Performance AES Architecture” International Journal of Engineering Technology, Management and Applied Sciences, Volume 3, Issue 6, July 2015, ISSN 2349-4476.

 

21.Ram Prasad J M, Dr. B.S Kariyappa and Ravishankar Holla, “Design and Implementation of Flash ADC for Low Power Applications” IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 4, Issue 6, Nov. 2014, ISSN: 2319 – 4200.

 

22.Dr. Kariyappa B S, Aravind, Dhananjaya A, and Vineet Puri, “Automated Solution for Data Monitoring (Dashboard) of ASIC Design Flow” International Journal of Computer Trends and Technology (IJCTT) – volume 4 Issue 7, July 2013, ISSN: 2231-2803.

 

23.Kariyappa B. S, Hariprasad S. A and et.al, “Programmable speed controller of AC Servomotor using FPGA,” International Journal of Applied Engineering Research (IJAER), ISSN 1087-1090, Vol. 3, No. 12, December 2008, India.

 

24.Kariyappa B. S and Dr. M. Uttara Kumari “FPGA based speed control of AC Servomotor using Sinusoidal PWM,” International Journal of Computer Science and Network Security(IJCSNS ), ISSN 1738-7906, Vol. 8, No. 10, October 2008, Korea.

 

International Conferences:

1

Sayyedhussain Siddiqui and Kariyappa B S, “ SoC Verification of ARM-based CoreSight (CS) IP and Design-for-Debuggability (DFD)” 7Th International Conference on Microelectronics, Computing & Communication Systems (MCCS-2022) in association with Indian society for VLSI Educatio, Ranchi(Jharkhand), 9th to 10th July 2022.
2

Chandra Shekhar S and Kariyappa B S,“Synthesis and Timing Analysis of a SoC Module”, 7Th International Conference on Microelectronics, Computing & Communication Systems (MCCS-2022) in association with Indian society for VLSI Educatio, Ranchi(Jharkhand), 9th to 10th July 2022.
3

Chandra Shekhar S, Sayyedhussain S and Kariyappa B S, “Comparative Analysis of Charge Pumps for PLL Applications” International Conference on Distributed Computing and Electrical Circuits and Electronics (ICDCECE-2022), April 2022, Ballari Institute Of Technology & Management, Ballari, IEEE.
4

Praveen Kumar Y G, Kariyappa B S, “Realisation of Power and Area efficient 16-bit Equality Comparator using m-GDI Technology”, 2021 IEEE Mysore Sub Section International Conference, NAVKIS College of Engineering, Hassan, October-2021, ISBN: 978-0-7381-4662-1/21, IEEE.
5

Anagha Umashankar, Dr.B.S.Kariyappa, Automation in implementation of asserting clock signals in High-Speed Mixed Signal Circuits to reduce TAT, proceedings of International Conference on Cognitive Informatics & Soft Computing (CISC-2021) – Springer Lecture Notes in Networks and System, August-2021, Balasore College of Engineering & Technology, Odisha, India.
6

Mohammed Vazeer Ahmed, Kariyappa B S, “Optimization of Cloning in Clock Gating Cells for High Performance Clock Networks, Accepted in 4th International Conference on Cognitive Information Soft Computing (CISC-2021)-Springer Lecture Notes in Networks and System, August-2021, Balasore College of Engineering & Technology, Odisha, India.
7 Asha K, Kariyappa B S and Vishal Kulakarni “Digital Twin Ranorex Test Automation of SIPROTEC 5 Protection Devices”, 3rd International Conference on Electronics and Communication and Aerospace Technology, Coimbatore, IEEE, June 2019, ISBN: 978-1-7281-0167-5.

8

Arjun G, Kariyappa B S and Nitin Jadon, “Optimization of Runtime and Memory Footprint in SOC Verification”, International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT-2019), Bengaluru, IEEE, May 2019, ISBN: 978-1-7281-0630-4.

9

D. Binu and Kariyappa B S, “Fault Isolation in Analog Circuits using MultiSupport Vector Neural Network”, 3rd International Conference on Communication and Electronics Systems (ICCES 2018), Coimbatore, IEEE, October 2018, ISBN: 978-1-5386-4765-3.
10

Nikitha L, Bhargavi N.Sand Kariyappa B.S, “Design and Development of Non-volatile Multi-threshold Schmitt Trigger SRAM Cell”, 3rd International Conference on Emerging Research in Electronics, Computer Science and Technology (ICERECT-2018), Mandya, Springer, LNEE, August 2018, Volume 545, Page: 877-884, ISBN:978-981-13-5802-9.

11

D. Binu, Kariyappa B S, “Support vector Neural Network and Principal Component Analysis for fault diagnosis of analog circuits”, International Conference on Intelligent Data Communication Technologies and Internet of Things  (ICICI 2018),  Coimbatore, Springer, LNDECT, August 2018,  Volume 26, ISBN: 2367-4512.
12

Shilpa R, Pruthvi E Achar, Roja M, Sindu G R and Kariyappa B S “Design and Comparitive Analysis of Memristor and Magnetic Tunnel Junction (MTJ) based Non-Volatile SRAM Cell” International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT-2018), Bengaluru, IEEE, May 2018, ISBN: 978-1-5386-2439-5.

13

Shashank Meti, Bharath N, Praveen Kumar Y G and Kariyappa B S, “Design and Implementation of 8-bit Vedic Multiplier using mGDI Technique”,International Conference on Advances in Computing, Communications and Informatics (ICACCI), Manipal, IEEE, September 2017, ISBN: 978-1-5090-6367-3.

14

Naman S Kumar, Sudhanva N G, Shreyas Hande V, Mallikarjun V Sajjan, Hemanth Kumar C S, and Kariyappa B S, “SRAM design using Memristor and Self-controllable Voltage (SVL) Technique” International Conference on Computational Intelligence & Data Engineering (ICCIDE 2017) Vijayawada, Andhra Pradesh, Springer, LNDECT, July 2017, ISBN: 978-981-10-6318-3. 
15

Srikanth G, Dr. B.S Kariyappa and et.al “Design of Full Adder using Amorphous Silicon Thin Film Transistor” International Conference on Computers and Electronics Engineering (ISRSED-ICCEE-2016), Hyderabad, McGraw Hill, January-2016, ISBN: 978-93-85880-97-1.

16

Basavaraj Madiwalar and Dr. Kariyappa B S, “Single Bit-line 7T SRAM cell for Low Power and High SNM” International Multi Conference on Automation, Computing, Control, Communication and Compressed Sensing (IMAC4S-13), 2013, IEEE, ISBN: 978-1-4673-5090-7.

17

Hari Prasad S.A, Kariyappa B.S and et.al, “A Novel technique of AC Power control using Microcontroller based Inverter,” IEEE-ICSP-08 (International Conference on Signal Processing), Beijing, China, 978-1-4244-2178-7, 2008, IEEE.

National conferences:

  1. Bheema. T and Dr. Kariyappa. B. S “Developing Inter-Integrated Circuit Master and Slave Universal Verification Component using UVM” National Conference on “Research Challenges in Power, Control, Communication and Instrumentation leading to Sustainable Technologies [NCPCCI-15]” 24 - 25 April, 2015.

 

  1. Sunil D K and Dr. Kariyappa. B. S “Low Power and High Speed Carry Select Adder” National Conference on “Research Challenges in Power, Control, Communication and Instrumentation leading to Sustainable Technologies [NCPCCI-15]” 24 - 25 April, 2015.

 

  1. Kariyappa B S and Krishna Saladi “Design and Implementation of Data Compression Algorithms Using MIL-STD-1553B Bus”, National Conference on Recent Trends in Communication, Electronics & Information Technology (NACTECIT- 09) MAY 14th &15th of 2009, CMR Institute of Technology, Bangalore.

 

  1. Kariyappa B S and V Ravi Chandra “Radar Simulation Bench – A Framework for Radar Testing” National Conference on Emerging Trends in Engineering and Technology” (NC-ETET-08), 24th and 25th of April 2008, Channabasaveshwara Institute of Technology, Gubbi, Tumkur District, Karnataka.

 

R&D Projects:

  1. A Study of defining maneuring parameters of ship model by analyzing wakes using image processing techniques.

Awards:

  1. Awarded Certificate for “academic excellence through research publications” from RSST, in the year 2018.
  2. Honored BHARAT VIKAS AWARD by Institute of Self Reliance (ISR) Bhubaneswar, Odisha for the occasion of “CITIZEN’s Day on 19th November 2017.
  3. Awarded Certificate in recognition for “Obtaining Ph.D. Degree” from ISTE-RVCE chapter, in the year 2012.
  4. Awarded Certificate for “academic excellence through research publications” from RSST, in the year 2010.
  5. Awarded Certificate for “academic excellence through research publications” from RSST, in the year 2009.
  
 

Notifications / CIrculars