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Dr. Shylashree N, Associate Professor

Educational Qualification

B.E ( Electronics & Communication Engineering),

M.Tech.( VLSI Design and Embedded Systems),

Ph.D in Elliptical Curve Cryptography on FPGA - VTU

Experience

Teaching: 19 years

Area of Interest

Cryptography ,VLSI

Email ID

shylashreen@rvce.edu.in

 

Date of Joining at RVCE : 16 Aug 2016

Subjects Handled : Basic Electronics, Network Analysis, Logic Design, Control Systems, CMOS VLSI, Cryptography & Network Security, Low Power VLSI Design

Course Link: https://sites.google.com/rvce.edu.in/rvce-ece-dvd

No. of Projects guided to UG Students : 40

No. of Projects guided to PG Students : 30

No. of Ph.D Guiding/Guided: 04

Publication Details

Journals:

Research Publications in International Journals:

1.Shylashree.N et.al, "Design and Implementation of 64-bit SRAM and CAM on Cadence and Open-source environment", International Journal of Circuit systems and Signal processing, Vol-15, Page-586-594, Scopus Indexed. Link;https://www.naun.org/main/NAUN/circuitssystemssignal/2021/b322005-065(2021).php

2.Shylashree N et.al, "Optimal path discovery for two moving sinks with a common junction in a wireless sensor network ",Indonesian Journal of Electrical Engineering and Computer Science, Vol 23, Issue 2, page -879-889. Scopus Indexed. Link:http://ijeecs.iaescore.com/index.php/IJEECS/article/view/25613/15270

3.Shylashree N et.al, "Comprehensive Design and Timing Analysis for High speed Master Slave D Flip-Flops using 18 nm FinFET Technology, August 2021. Web of science and Scopus Indexed. Link:https://www.tandfonline.com/doi/full/10.1080/03772063.2021.1948925

4.Rahul Priyadarshi, Piyush Rawat, Vijay Nath, Bibhudendra Acharya and N.Shylashree, “Three level heterogeneous clustering protocol for wireless sensor network”, Microsystem Technologies, Springer, May 2020. DOI 10.1007/s00542-020-0487-x. (Web of science & Scopus indexed). SCImago Journal Rank (Rating Q2 ). (Web of science & Scopus indexed) Scimago Journal & CountryRank –Q2 Link-https://link.springer.com/article/10.1007%2Fs00542-020-04874-x#citeas

5. A. S. Anand Swamy and N. Shylashree, "HDR Image Compression by Multi-Scale down Sampling of Intensity Levels", International Journal of Image and Graphics, World Scientific journal, Vol. 21, No. 2 (2021) 2150048 (30 pages), (Web of science & Scopus indexed). SCImago Journal Rank (Rating Q3 ).

6. N.Shylashree, B.G. Sangeetha, Adithya Thonse and Vijay Nath, “Ge4Sb1Te5 device case study for NVRAM applications”, Microsystem Technologies, Springer, Vol.25, Issue 12, Dec 2019. DOI 10.1007/s00542-019-04451-x. (Web of science & Scopus indexed –Q2) (Web of science & Scopus indexed) Scimago Journal & CountryRank –Q2 Link-https://link.springer.com/article/10.1007/s00542-019-04451-x#citeas

7. N.Shylashree, B.Venkatesh, T.M.Saurab, Tarun Srinivasan and Vijay Nath, “Design and Analysis of high-speed 8-bit ALU using 18nm FinFET technology”, Microsystem Technologies, Springer, Vol.25, Issue 6, June 2019. DOI 10.1007/s00542-018-4112-y. (Web of science & Scopus indexed –Q2) (Web of science & Scopus indexed) Scimago Journal & CountryRank –Q2 Link-https://link.springer.com/article/10.1007/s00542-018-4112-y#citeas

8. Shaik A. Qadeer, Mohammed Yousuf Khan, Shylashree N and Vijay Nath, “High resolution fuel indicating and tracking system, Springer, Vol.25, Issue 6, June 2019. DOI 10.1007/s00542-018-4107-8. (Web of science & Scopus indexed-Q2) (Web of science & Scopus indexed) Scimago Journal & CountryRank –Q2 Link-https://link.springer.com/article/10.1007/s00542-018-4107-8#citeas

9. M.M. Mohammed Imran and N Shylashree, “ Effective resistance calculation and automated solution for fixing reliability verification violations”, Microsystem Technologies, Springer, Vol.24, Issue 12, Dec 2018. DOI 10.1007/s00542-018-3886-2. (Web of Science & Scopus indexed-Q2) (Web of Science & Scopus indexed) Scimago Journal & CountryRank –Q2 Link-https://www.springerprofessional.de/en/effective-resistance-calculation-...

10. Shylashree N, “Non-crossing Rectilinear Shortest Minimum Bend Paths in the Presence of Rectilinear Obstacles”, Journal Of Telecommunications and Information Technology (JTIT), Vol 3, pp 82-91, September 2018. https://doi.org/10.26636/jtit.2018.120417.(Scopus Indexed –Q4) Scimago Journal & CountryRank –Q3 Link- https://www.il-pib.pl/czasopisma/JTIT/2018/3/82.pdf

11. Shylashree N and V Sridhar, “Hardware realization of fast elliptic curve multiplication using balanced ternary representation and pre-computation over GF(p)”, Taylor & Francis Journal of Discrete Mathematical Sciences & Cryptography (JDMSC), Vol.19, No.1, Feb 2016. (Web of science & Scopus indexed –Q3) (Web of Science & Scopus Indexed) Scimago Journal & CountryRank –Q4 Link- https://www.tandfonline.com/doi/abs/10.1080/09720529.2015.1103017

12. Prakash Biswagar, Pavithra R and N Shylashree, “Design and Implementation of efficient AES Algorithm for secure communications”, International Journal of Advanced Science and Technology, Vol.29, No.7, pp.2242-2251, May 2020 (Scopus indexed –Q4)

13. Bhargavi N.S and Shylashree N, “Analysis and Optimization of timing paths in MTCMOS based Change-sensing Flip Flop for SoC Design”, International Journal Of Engineering and Advance technology(IJEAT), Vol 8, Issue-5, pp 1898-1904, June 2019.(Scopus Indexed) Link-https://www.ijeat.org/wp-content/uploads/papers/v8i5/E7898068519.pdf

14. Vinay P and Shylashree N, “Verification of JESD204BTX Soft IP using Universal Verification Methodology”, International Journal Of Innovative Technology and Exploring Engineering (IJITEE), Vol 8, Issue 3, pp 166-175, Jan 2019. (Scopus Indexed) Linkhttps://www.researchgate.net/publica/331043853_Verification_of_JESD204BT...

15. Shylashree N, “Two Stage Block Truncation Coding for lower Mean Square Error”, International Journal Of Recent Technology and Engineering (IJRTE), Vol 7, Issue 5, pp 127-131, Jan 2019. https://doi.org/10.26636/jtit.2018.120417.(Scopus Indexed) Link-https://www.ijrte.org/wp-content/uploads/papers/v7i5/E2113017519.pdf

16. Anirudh lanka, Aishwarya shivani, Amoolya R Bayari, Suresh Dakkumalla and Shylashree N, “Code acquisition and tracking of IRNSS signals”, International Journal Of recent technology and Engineering (IJRTE), Vol 7, Issue-6S4, pp 629-635, April 2019.(Scopus Indexed) Link-https://www.researchgate.net/publication/333893998_F11290476S419

17. Latency and throughput analysis of a pipelined GDI ripple carry adder, International Journal of Engineering and Technology (IJET), Vol.7(2.21), April 2018(with Mahesh D S). (Scopus Indexed-Q4) Scimago Journal & CountryRank –Q4 Link- https://www.sciencepubco.com/index.php/ijet/article/view/11848

18. Multiple Forward Error Correction in ARQ Systems by Combining Three Consecutive Erroneous Frames in a Wireless Sensor Network, International Journal of Applied Engineering Research (IJAER), Vol.12, No.14, July 2017(with Pratibha K). (Scopus Indexed) Link- https://www.ripublication.com/ijaer17/ijaerv12n14_52.pdf

19. Hardware realization of high-speed elliptic curve point multiplication using pre-computation over GF(p), Journal of Computer Science (JCS), Vol.10, No.07, pp.1094-1106, Feb 2014, USA and Australia. ISSN 1549-3636 (with V. Sridhar). (Scopus Indexed) Link- https://thescipub.com/abstract/10.3844/jcssp.2014.1094.1106

20. Hardware realization of fast multi-scalar elliptic curve point multiplication by reducing the Hamming weights over GF(p),International Journal of Computer Network and Information security (IJCNIS), Vol.6, No.10,pp.57-63, Sept2014, Hong Kong. ISSN 2074-9104 (with V. Sridhar). Link- http://www.mecs-press.org/ijcnis/ijcnis-v6-n10/v6n10-7.html.

21. Javalkar Vinay Kumar, N Shylashree, Spoorthi G Gojanur, G Raju, Vinay Varma Bhupathiraju, Manjunatha Channegowda, “Design and Analysis of a Biosensor for the Detection of Estrogen Hormonal Levels”, BioNanoScience, Springer, Feb 2022 https://doi.org/10.1007/s12668-022-00951-9. (Web of science & Scopus indexed) ScimagoJournal & Country Rank –Q3 Link- https://link.springer.com/article/10.1007/s12668-022-00951-9 .

22. AS Anand Swamy, AS Mamatha, N Shylashree, Vijay Nath, “Lossless Compression of Hyperspectral Imagery by Assimilating Decorrelation and Pre-processing with Efficient Displaying Using Multiscale HDR Approach IETE Journal of Research, Taylor & Francis, Feb 2022. https://doi.org/10.1080/03772063.2022.2028581(Web of Science & Scopus indexed) Scimago Journal & Country Rank –Q3 Link- https://www.tandfonline.com/doi/full/10.1080/03772063.2022.2028581 .

23. Shylashree, N., Anil Naik, M., Mamatha, A.S., Sridhar, V., “Design and Implementation of Image Edge Detection Algorithm on FPGA”, International Journal of Circuits, Systems and Signal Processing, NAUN s, Vol.16, pp. 628–636, Jan 2022. https://doi.org/ 10.46300/9106.2022.16.78. (Scopus indexed) Scimago Journal & Country Rank –Q4 Link https://npublications.com/journals/articles.php?id=201

International Conferences:

  1. Dr.Shylashree N "Review on Biosensors: Fundamentals, Classifications, Characteristics, Simulations and Potential Applications" IOP Science, ECS Transactions, Vol. 107,issue 1.

  2. V Balaji, Ch KSD Ranga, N Shylashree, N Praveena, “Design of a Delta Threshold Voltage Difference based fully Embedded Read Only Memory along with a Skew Sense Amplifier”, 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT),pp. 475-479, IEEE, 2019. (Scopus Indexed) Link-https://ieeexplore.ieee.org/abstract/document/9016855

  3. D Yashas, P Sri Hari Babu, N Shylashree, “UVM-based Logic Verification of Input Output Interface”, 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT),pp. 420-423, IEEE, 2019. (Scopus Indexed) Link-https://ieeexplore.ieee.org/abstract/document/9016934

  4. N Shylashree, MM Mohammed Imran, “Effective resistance calculation and automated solution for fixing reliability verification violations”, in the International Conference INDICON 2017, pp. 1-5, at IIT Roorke, India, IEEE, 2018. (Scopus Indexed) Link-https://www.semanticscholar.org/paper/Effective-Resistance-Calculation-f...

  5. Shylashree N, Uma B V , Dhanush S, Sagar Abachi, Nisarga, Aashith K & Sangeetha B G, “Preparation and characterization of Sb2Se3 devices for memory applications”, AIP Conference Proceedings, ICIRMCT- 2018. 23-24th March, Coimbatore, India. (Web of Science and Scopus Indexed) Link- https://aip.scitation.org/doi/abs/10.1063/1.5038711?journalCode=apc

  6. Shylashree N Sangeetha B G “Electrical studies of Ge4Sb1Te5 devices for memory applications”, AIP Conference Proceedings, ICIRMCT- 2018. 23-24th March, Coimbatore, India. (Web of Science and Scopus Indexed). Link- https://aip.scitation.org/doi/10.1063/1.5038710

  7. N Shylashree, V Sridhar, D Patawardhan “FPGA Based Efficient Elliptic Curve Cryptosystem Processor for NIST 256 Prime Field”, Proceedings of International Conference IEEE – TENCON 2016. 21st –24th November 2016, Singapore. (Web of Science and Scopus Indexed) Link- https://ieeexplore.ieee.org/document/7847988

  8. N Shylashree, V Sridhar “Efficient implementation of scalar multiplication for ECC in GF (2m) on FPGA”, Proceedings of International Conference IEEE – ICERECT-2015. 17th –19th December 2015, Mandya). (Scopus Indexed) Link-https://ieeexplore.ieee.org/document/7499063

  9. N Shylashree, V Sridhar “FPGA Implementation of High Speed Scalar Multiplication for ECC in GF(p), Proceedings of International Conference IEEE – TENCON 2015. 1st –4th November 2015, Macau(Web of Science and Scopus Indexed) (Nominated for Best paper) sponsored by DST, Government of India as a young research scholar.  Link- https://ieeexplore.ieee.org/document/7373070

  10. Shylashree N, V Sridhar “A unified architecture for a dual-field ECC processor applicable to AES” in the Fifth International Conference on Computational Intelligence, Modelling and Simulation (CIMSim 2013), pp. 321-326, at Seoul, South Korea, IEEE, 2013. (Scopus Indexed) Link- https://ieeexplore.ieee.org/document/6663204

  11. N Shylashree, V Sridhar “Hardware realization of high-speed elliptic curve point multiplication using multiple point doublers and point adders” in the International Conference INDICON 2013, pp. 1-6, at IIT Bombay, India, IEEE, 2013. (Web of Science and Scopus Indexed) Link- https://ieeexplore.ieee.org/document/6726157

  12. N Shylashree, V Sridhar, KL Prabhasa “Fast and Efficient Implementation of AES on FPGA using Polynomial Notation for Mix Column and Inverse Mix Column”, International Conference on Computer Applications: 24-27 December 2010, Pondicherry, India

International Symposium:

  1. Two Day Symposium on “Tech Treat on Emerging Technologies” at BNMIT , Bangalore, from 4th to 5th August 2016.

     BOOK SERIES

  1. N Shylashree, Adithya Thonse, Aditya Madhavan and BG Sangeetha, “Electrical Characterization of Sb2Se3 for Memory Applications”, Proceedings of the Fourth International Conference on Microelectronics, Computing and Communication Systems, LNEE book series, Springer, Vol 673, pp 825-833, September 2020. (Web of Science and Scopus Indexed) Scimago Journal & CountryRank –Q3 Link- https://link.springer.com/chapter/10.1007%2F978-981-15-5546-6_68#citeas

  2. N.Shylashree, amruta Hosur and N. Praveena, “Design of ternary SRAM Cell Based on Level Shift Ternary Inverter”, Emerging Research in Electronics, Computer Science and Technology, LNEE book series, Springer, Vol 545, pp 903-914, April 2019. (Web of Science and Scopus Indexed) Scimago Journal & CountryRank –Q3 Link-https://link.springer.com/chapter/10.1007/978-981-13-5802-9_79#citeas

  3. Amruta Hosur and N.Shylashree,, “Structural Testing of Multichip Module SoC Components”,  Proceedings of the Third International Conference on Microelectronics, Computing and Communication Systems, LNEE book series, Springer, Vol 556, pp 535-550, May 2019. (Web of Science and Scopus Indexed) Scimago Journal & CountryRank –Q3 Link-https://link.springer.com/chapter/10.1007/978-981-13-7091-5_44#citeas.

  4. N Shylashree, H M Supritha, “Design and Implementation of a Small Hand Held Camera Detector on FPGA”, Proceedings of the Fifth International Conference on Microelectronics, Computing and Communication Systems, LNEE book series, Springer, Vol 673, pp 501- 512, September 2021. (Web of Science and Scopus Indexed) Scimago Journal & Country Rank –Q4 Link- https://link.springer.com/chapter/10.1007/978-981-16-0275-7_41

  5. R Tejas, Pavan Macherla, N Shylashree  “ Image Sensor—CCD and CMOS ”, Proceedings of the International Conference on Microelectronics, Communication Systems, Machine Learning and Internet of Things, LNEE book series, Springer, Vol 887, pp  455-484, July 2023. (Web of Science and Scopus Indexed) Scimago Journal & Country Rank –Q4 Link- https://link.springer.com/chapter/10.1007/978-981-19-1906-0_40

  6. Anand Swamy A S ,N Shylashree,  “Multiscale Decomposition of HDRImages Using the Edge-Preserving Filters  ”,  Proceedings of the International Conference on Microelectronics, Communication Systems, Machine Learning and Internet of Things, LNEE book series, Springer, Vol 887, pp  573–600, July 2023. (Web of Science and Scopus Indexed) Scimago Journal & Country Rank –Q4 Link- https://link.springer.com/chapter/10.1007/978-981-19-1906-0_48

Univeristy Responsibilities

  • Appointed as Deputy Chief Coordinator at VTU Digitization centre, Regional Office, Bengaluru, for May / June /July 2016 UG/PG Exam

  • Taken sessions in VTU e-shikhanna and VTU EDUSAT programme for the subject Basic Electronics, Electronic Devices and Micro Electronics Circuits In the year 2019 and 2013.

 Patents

1.  Srikrishana Prasad and Shylashree N, “ANONYMIZED GENERATING AND PROVING OF PROCESSED DATA” US Patent, Granted on 1-03-2022, US Patent No: US011265143B2
Link- https://patentimages.storage.googleapis.com/a2/29/2b/7954d2bc0f7a63/US11265143.pdf
2. Srikrishana Prasad and Shylashree N, “Anonymized generation and Verification of processed data  ” European Patent, Filed on 26/06/2020 under the filing no. DE102020207980 (B3) and granted on 30/09/2021. Link-https://worldwide.espacenet.com/searchResults?submitted=true&locale=de_EP&DB=EPODOC&ST=advanced&PN=DE102020207980
3. Shylashree N, Praveena N, Prasad shenoy and Uma B V, “A HIGH SPEED LOW POWER TERNARY CONTENT ADDRESSABLE MEMORY DEVICE” Indian Patent,
Filed on 04/12/2020 under Application number 202041052977 and granted on 29/06/2021. Patent Number :370565 Link: https://ipindiaservices.gov.in/PatentSearch/PatentSearch/ViewApplicationStatus
4. Shylashree N, Supritha H M, Abhay Deshpande A and Uma B V, “A HANDHELD HIDDEN CAMERA DETECTING DEVICE” Indian Patent, Filed on 29/12/2020 under the Application number 202041056998 and granted on 03/09/2021. Patent Number :376436 Link-https://ipindiaservices.gov.in/PatentSearch/PatentSearch/ViewApplicationStatus
5. Shylashree N and V Sridhar, “METHOD, SYSTEM AND APPARATUS FOR EFFICIENT HIGH SPEED ELLIPTIC CURVE POINT MULTIPLICATION OVER PRIME FIELD” Indian Patent, Filed on 31/08/2018 under the application number 201841032883 and granted on 08/10/2021. Patent Number:378647 Link-http://ipindiaservices.gov.in/PatentSearch/PatentSearch//ViewApplicationStatus
6. Shylashree N and V Sridhar, “METHOD, SYSTEM AND APPARATUS FOR FAST MULTI SCALAR ELLIPTIC CURVE POINT MULTIPLICATION OVER PRIME FIELD”, Indian Patent, Filed on 31/08/2018 under the application number 201841032882 and published on 06/03/2020 Link- http://ipindiaservices.gov.in/PatentSearch/PatentSearch//ViewApplicationStatus

Consultancy Project Details:

     1. The design and Development of Smart Pest Traps started in the month of May 2022. The project is in progress. Amount-23000/-

      2. Variable Frequency Drive on FPGA, during the period from 1st January,2020 to 30th June,2020. The project has been completed successfully. Amount-46,000/-

Funded Project Details:

     1.Granted 3 lakhs from VGST (Government of Karnataka) under RGS/F scheme in the year 2019-2020 and the title is as follows • Preparation and Characterization of Chalcogenide Materials for Phase Change Memory applications Link- http://www.vgst.in/downloads/RGSF%2019-20.pdf. Serial no.19.

Books Published (Details)
1. Network Theory text book”, September 2019 published by MEDTECH A Division of Scientific International, Delhi
2. Engineering Statistics & Linear Algebra text book, May 2021 published by New age international publishers, Delhi
3. Control Engineering text book, June 2021 published by New age international publishers, Delhi
4.Basic Electronics, Lab manual published by Subhas Stores
Awards

  1. Recognition for Outstanding leadership as Executive member IEEE CAS society Bangalore chapter for the year 2020 and 2021 (IEEE CAS)

  2. IEEE – ICERECT-2015. 17th –19th December 2015, Mandya (Got Best paper award).

  3. IEEE – TENCON 2015. 1st – 4th November 2015, Macau (Nominated for Best paper).

  4. Received Best Researcher award for the year 2020 in grateful appreciation and distinguished recognition of my research works and efforts towards IEEE Bangalore section.

  5. Received best PhD thesis award for the year 2016-17 in Electronics and Communication Engineering from BITES in association with Karnataka government.Link- https://bites.org.in/search/node/shylashree%202016-17

  6. Received Best Researcher award for the year 2022 from ISTE chapter, RVCE

  7. Received Domain certification under Faculty domain-advanced from NPTEL/SWAYA

  8. Received Motivated learner certificate from NPTEL/SWAYAM

  9. Secured Top 5% in Intellectual Property online certification course from NPTEL

Notifications / CIrculars