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Mrs. Deepika. P

Asst Professor.

Educational Qualification

B.E.(Electronics and communication),

M.Tech.(VLSI design and embedded systems)

Experience

Teaching: 8 years

Industry : 2 years

Area of Interest

Digital VLSI design, Low Power VLSI, Verilog

Email ID

deepikaprabhakar @rvce.edu.in

 

 

Date of Joining at RVCE : 21/08/2014

Subjects Handled : Advanced digital design using verlog HDL, Digital VLSI design, Algorithms for VLSI design

No. of Projects guided to UG Students : 10

No. of Projects guided to PG Students : 04

Publication Details

International Journals

1. Karthik Maiya*1 Deepika P2  “REVIEW ON EXISTING COUNTER MEASURES AGAINST SCAN BASED SIDE CHANNEL ATTACKS” International Journal of Engineering Technology Research & Management  Vol-4 Issues 05, May -2020

2. Raghuvarya S,Deepika P “A Review on Power State Coordination in Application Processors using ARM Specified PSCI” International Research Journal of Engineering and Technology (IRJET)

3. Sachin Manohar Ranasubhe, Deepika P , “Review of Leakage Power Recovery Methodologies in VLSI Design” International Research Journal of Engineering and Technology (IRJET) Volume 7, Issue 6,  June 2020 https://irjet.net/volume7-issue6 S.No: 59

4. Sumanth Sajjanar, Mrs. Deepika Prabhakar A Review on BIST Embedded I2C and SPI using Verilog HDL International Research Journal of Engineering and Technology (IRJET) Volume 7, Issue 5,  May 2020  (https://irjet.net/volume7-issue5) S.No: 1208

5. Vishala I Nari, Deepika P , "VALIDATION, TIMING ANALYSIS AND POWERANALYSIS OF MULTIFUNCTIONAL IO CELL" published in Journal of critics reviews -2020, VOL 7, ISSUE 14, 2020 .

6. Swaroop, Deepika Prabhakar "Hardhat Detection Using IR and Depth Frames" Journal of University of Shanghai for Science and Technology " ISSN:1007-6735

7. Karthik maiyya, Deepika P "REVIEW ON EXISTING COUNTER MEASURES AGAINST SCAN BASED SIDE CHANNEL ATTACKS " International Journal of Engineering Technology Research & Management Published 2020.

8. Raghuvarya, Deepika P "A review on power state coordination in application processor using ARM specified PSCI" International Research Journal of Engineering and Technology (IRJET)Published 2020

9. Sachin Manohar Ranasubhe, Deepika P "Review of leakage power recovery methodologies in VLSI design" Published 2020.

10. Jafar Sharif,  Jagadeesh Kishore,  Raj Kumar, Arjun Kankanavadi,  Deepika Prabhakar, " Multi level Home Security and intrusion detection System Using Arduino Mega and GSM" International Journal of Engineering Research in Electronics and Communication Engineering (IJERECE) Vol 8, Issue 5, May 2021.

International Conferences

1. Shridhar Patil, Deepika P " Compression of Bayer Colour Filter Array Images" 2019 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT-2019), MAY 17th & 18th 2019

2. Kavyashree.M, Deepika .P, "ASIC Implementation of I2C using Physical Aware Synthesis", International Conference on Inventive Researchin Computing Applications [ICIRCA 2021]

3. V Govardhan, Deepika P, "Design and Verification of Asynchronous Design using Scalable Static and Formal Methodologies " MCCS 2021 conference, (SCOPUS Q4, Web of science)"

National conferences:

  1. Deepika. P, “Implementation of compliment test pattern generator for low dynamic power consumption”, National conference on Recent trends in electronics and communication engineering, Bangalore- May 2012.

  2. Deepika. P, Imran makkandar, “Improving the Efficiency of the IPSec Hardware Accelerator on Xilinx FPGA”, National conference on ICT innovation for sustainability, Bangalore-May 2014.

  1. Deepika P, Pavan Gujamagadi, Praveen Kumar V, “Modeling for FinFETs and Strategy for Test Algorithm Creation” , Research Challenges in Power, Control, Communication and Instrumentation leading to Sustainable Technologies [NCPCCI-15], Bangalore-April 2014.

Funded Project Details:
Proposal entitled "Preparation and characterization of chalcogenide materials for phase change memory applications" was approved under VGST scheme of R-GSF Government of India

Awards:

  1. “Implementation of compliment test pattern generator for low dynamic power consumption” Paper is awarded as best paper in the area of VLSI design.